A Time Domain Reflectometer with 100 ps precision implemented in a cost-effective FPGA for the test of the KLOE-2 Inner Tracker readout anodes

2013
journal article
article
12
dc.abstract.enA Time Domain Reflectometer implemented in a single cost-effective Field Programmable Gate Array device is shown to achieve a precision around 100ps. The Time to Digital Converter section of the device is based on a tapped delay line followed by an encoder and shows both Differential and Integral Non-Linearity below one least significant bit. The same Field Programmable Gate Array houses an 8051 8-bits microprocessor, for the control of the pulse signals generation, the acquisition and the first treatment of raw data. Principles of operation, architecture, performance and preliminary trials on the prototype are presented in this paper. As an example of possible application, the proposed circuit has been usefully used to perform the quality control of the micro-strip anodic planes of the Gas Electron Multiplier Inner Tracker of the KLOE-2 experiment.pl
dc.affiliationWydział Fizyki, Astronomii i Informatyki Stosowanej : Instytut Fizyki im. Mariana Smoluchowskiegopl
dc.contributor.authorBencivenni, G.pl
dc.contributor.authorCzerwiński, Eryk - 102850 pl
dc.contributor.authorDe Lucia, E.pl
dc.contributor.authorDe Robertis, G.pl
dc.contributor.authorDomenici, D.pl
dc.contributor.authorErriquez, O.pl
dc.contributor.authorFanizzi, G.pl
dc.contributor.authorFelici, G.pl
dc.contributor.authorLiuzzi, R.pl
dc.contributor.authorLoddo, F.pl
dc.contributor.authorMongelli, M.pl
dc.contributor.authorMorello, G.pl
dc.contributor.authorRanieri, A.pl
dc.contributor.authorValentino, V.pl
dc.date.accessioned2018-03-07T11:33:20Z
dc.date.available2018-03-07T11:33:20Z
dc.date.issued2013pl
dc.description.physical185-191pl
dc.description.volume698pl
dc.identifier.doi10.1016/j.nima.2012.10.023pl
dc.identifier.eissn1872-9576pl
dc.identifier.issn0168-9002pl
dc.identifier.urihttps://ruj.uj.edu.pl/xmlui/handle/item/51363
dc.languageengpl
dc.language.containerengpl
dc.rightsDodaję tylko opis bibliograficzny*
dc.rights.licencebez licencji
dc.rights.uri*
dc.subject.enField Programmable Gate Array (FPGA)pl
dc.subject.enmicro-strippl
dc.subject.enstatistical code methodpl
dc.subject.entapped delay linepl
dc.subject.enTime Domain Reflectometer (TDR)pl
dc.subtypeArticlepl
dc.titleA Time Domain Reflectometer with 100 ps precision implemented in a cost-effective FPGA for the test of the KLOE-2 Inner Tracker readout anodespl
dc.title.journalNuclear Instruments and Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipmentpl
dc.typeJournalArticlepl
dspace.entity.typePublication
dc.abstract.enpl
A Time Domain Reflectometer implemented in a single cost-effective Field Programmable Gate Array device is shown to achieve a precision around 100ps. The Time to Digital Converter section of the device is based on a tapped delay line followed by an encoder and shows both Differential and Integral Non-Linearity below one least significant bit. The same Field Programmable Gate Array houses an 8051 8-bits microprocessor, for the control of the pulse signals generation, the acquisition and the first treatment of raw data. Principles of operation, architecture, performance and preliminary trials on the prototype are presented in this paper. As an example of possible application, the proposed circuit has been usefully used to perform the quality control of the micro-strip anodic planes of the Gas Electron Multiplier Inner Tracker of the KLOE-2 experiment.
dc.affiliationpl
Wydział Fizyki, Astronomii i Informatyki Stosowanej : Instytut Fizyki im. Mariana Smoluchowskiego
dc.contributor.authorpl
Bencivenni, G.
dc.contributor.authorpl
Czerwiński, Eryk - 102850
dc.contributor.authorpl
De Lucia, E.
dc.contributor.authorpl
De Robertis, G.
dc.contributor.authorpl
Domenici, D.
dc.contributor.authorpl
Erriquez, O.
dc.contributor.authorpl
Fanizzi, G.
dc.contributor.authorpl
Felici, G.
dc.contributor.authorpl
Liuzzi, R.
dc.contributor.authorpl
Loddo, F.
dc.contributor.authorpl
Mongelli, M.
dc.contributor.authorpl
Morello, G.
dc.contributor.authorpl
Ranieri, A.
dc.contributor.authorpl
Valentino, V.
dc.date.accessioned
2018-03-07T11:33:20Z
dc.date.available
2018-03-07T11:33:20Z
dc.date.issuedpl
2013
dc.description.physicalpl
185-191
dc.description.volumepl
698
dc.identifier.doipl
10.1016/j.nima.2012.10.023
dc.identifier.eissnpl
1872-9576
dc.identifier.issnpl
0168-9002
dc.identifier.uri
https://ruj.uj.edu.pl/xmlui/handle/item/51363
dc.languagepl
eng
dc.language.containerpl
eng
dc.rights*
Dodaję tylko opis bibliograficzny
dc.rights.licence
bez licencji
dc.rights.uri*
dc.subject.enpl
Field Programmable Gate Array (FPGA)
dc.subject.enpl
micro-strip
dc.subject.enpl
statistical code method
dc.subject.enpl
tapped delay line
dc.subject.enpl
Time Domain Reflectometer (TDR)
dc.subtypepl
Article
dc.titlepl
A Time Domain Reflectometer with 100 ps precision implemented in a cost-effective FPGA for the test of the KLOE-2 Inner Tracker readout anodes
dc.title.journalpl
Nuclear Instruments and Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment
dc.typepl
JournalArticle
dspace.entity.type
Publication
Affiliations

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