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A Time Domain Reflectometer with 100 ps precision implemented in a cost-effective FPGA for the test of the KLOE-2 Inner Tracker readout anodes
Field Programmable Gate Array (FPGA)
micro-strip
statistical code method
tapped delay line
Time Domain Reflectometer (TDR)
A Time Domain Reflectometer implemented in a single cost-effective Field Programmable Gate Array device is shown to achieve a precision around 100ps. The Time to Digital Converter section of the device is based on a tapped delay line followed by an encoder and shows both Differential and Integral Non-Linearity below one least significant bit. The same Field Programmable Gate Array houses an 8051 8-bits microprocessor, for the control of the pulse signals generation, the acquisition and the first treatment of raw data. Principles of operation, architecture, performance and preliminary trials on the prototype are presented in this paper. As an example of possible application, the proposed circuit has been usefully used to perform the quality control of the micro-strip anodic planes of the Gas Electron Multiplier Inner Tracker of the KLOE-2 experiment.
dc.abstract.en | A Time Domain Reflectometer implemented in a single cost-effective Field Programmable Gate Array device is shown to achieve a precision around 100ps. The Time to Digital Converter section of the device is based on a tapped delay line followed by an encoder and shows both Differential and Integral Non-Linearity below one least significant bit. The same Field Programmable Gate Array houses an 8051 8-bits microprocessor, for the control of the pulse signals generation, the acquisition and the first treatment of raw data. Principles of operation, architecture, performance and preliminary trials on the prototype are presented in this paper. As an example of possible application, the proposed circuit has been usefully used to perform the quality control of the micro-strip anodic planes of the Gas Electron Multiplier Inner Tracker of the KLOE-2 experiment. | pl |
dc.affiliation | Wydział Fizyki, Astronomii i Informatyki Stosowanej : Instytut Fizyki im. Mariana Smoluchowskiego | pl |
dc.contributor.author | Bencivenni, G. | pl |
dc.contributor.author | Czerwiński, Eryk - 102850 | pl |
dc.contributor.author | De Lucia, E. | pl |
dc.contributor.author | De Robertis, G. | pl |
dc.contributor.author | Domenici, D. | pl |
dc.contributor.author | Erriquez, O. | pl |
dc.contributor.author | Fanizzi, G. | pl |
dc.contributor.author | Felici, G. | pl |
dc.contributor.author | Liuzzi, R. | pl |
dc.contributor.author | Loddo, F. | pl |
dc.contributor.author | Mongelli, M. | pl |
dc.contributor.author | Morello, G. | pl |
dc.contributor.author | Ranieri, A. | pl |
dc.contributor.author | Valentino, V. | pl |
dc.date.accessioned | 2018-03-07T11:33:20Z | |
dc.date.available | 2018-03-07T11:33:20Z | |
dc.date.issued | 2013 | pl |
dc.description.physical | 185-191 | pl |
dc.description.volume | 698 | pl |
dc.identifier.doi | 10.1016/j.nima.2012.10.023 | pl |
dc.identifier.eissn | 1872-9576 | pl |
dc.identifier.issn | 0168-9002 | pl |
dc.identifier.uri | https://ruj.uj.edu.pl/xmlui/handle/item/51363 | |
dc.language | eng | pl |
dc.language.container | eng | pl |
dc.rights | Dodaję tylko opis bibliograficzny | * |
dc.rights.licence | bez licencji | |
dc.rights.uri | * | |
dc.subject.en | Field Programmable Gate Array (FPGA) | pl |
dc.subject.en | micro-strip | pl |
dc.subject.en | statistical code method | pl |
dc.subject.en | tapped delay line | pl |
dc.subject.en | Time Domain Reflectometer (TDR) | pl |
dc.subtype | Article | pl |
dc.title | A Time Domain Reflectometer with 100 ps precision implemented in a cost-effective FPGA for the test of the KLOE-2 Inner Tracker readout anodes | pl |
dc.title.journal | Nuclear Instruments and Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment | pl |
dc.type | JournalArticle | pl |
dspace.entity.type | Publication |